journal 2026-04-28

P10 — Tiny Tapeout port of the P02 counter/PWM/LFSR

p10

Closing the day with the last roadmap rung. A thin wrapper that adapts P02 (counter/PWM/LFSR) into the Tiny Tapeout user-project pin frame.

What happened

Status: rtl-pass. This is not the actual TT submission — that has its own CI flow against fixed tile sizes — but a sanity-check build that confirms the pin shape synthesizes cleanly under our existing LibreLane harness.

The TT pin frame is a fixed module signature: tt_um_* name, 8 ui_in, 8 uo_out, 8 uio_in / 8 uio_out / 8 uio_oe (bidirectional pads that the user controls on a per-pin basis), plus clk, rst_n, and ena (a synchronous enable that the TT carrier asserts when this user project gets selected from the multiplexer). Everything maps to one fixed signature tt_um_librelane_p02.

Pin map for the wrapper:

ui_in[1:0]   = mode       (00 counter, 01 LFSR, 10 PWM, 11 zero)
uio_in[7:0]  = threshold  (PWM threshold)
uo_out[7:0]  = mode-selected output
ena          = synchronous enable on top of rst_n (mute outputs when low)
uio_oe       = 0          (uio is input-only here)

Tests verify the wrapper preserves P02’s behaviour: ena=0 mutes outputs, the counter advances, PWM duty matches threshold. Running P02’s own logic underneath means we trust the harden trail: the inner module is the same one that landed at +1.24 ns slow-corner slack in P02 back in the morning.

Roadmap status: 01-07 hardened, 08-10 rtl-pass. The ladder reaches the tenth rung. Tomorrow is for taking another swing at landing P08’s macro flow on a clean signoff.

Receipts

Project page: /projects/10_tiny_tapeout/.