journal 2026-05-01

P34 turns the DRV mess into a small tail

p34riscvrv32mlibrelanetiming

P34 is the cleanup pass after P33 closed setup timing.

The target was narrow: keep the RV32IM runtime and ACT4/Sail coverage from P33, then attack the remaining electrical design-rule violations. P33 ended with setup and hold clean, but still had 2241 max-slew violations and 291 max-cap violations.

The useful RTL change was to stop pushing a large asynchronous CPU reset tree through the whole core. P34 registers the loader-to-CPU release and makes the main core reset synchronous. The backend config then leans harder on slow-corner repair, post-global-route design repair, post-global-route timing repair, stronger slew/cap margins, and 250 um wire repair.

Command:

make harden PROJECT=34_rv32im_drv_cleanup

Result: PASS, with residual DRV warnings.

checkresult
Directed RV32IM runtimePASS
ACT4/Sail rv32i/IPASS=39 FAIL=0 NOT RUN=0
ACT4/Sail rv32i/MPASS=8 FAIL=0 NOT RUN=0
Full RISC-V complianceNOT RUN
LibreLane flowPASS
Run directoryprojects/34_rv32im_drv_cleanup/librelane/runs/RUN_2026-05-01_14-58-10
Final GDSprojects/34_rv32im_drv_cleanup/librelane/runs/RUN_2026-05-01_14-58-10/final/gds/top.gds
Metricsprojects/34_rv32im_drv_cleanup/librelane/runs/RUN_2026-05-01_14-58-10/final/metrics.json
Magic DRCPASS (0 errors)
KLayout DRCPASS (0 errors)
LVSPASS (0 errors)
AntennaPASS (0 violations)
Setup timingPASS (0 violations, worst setup slack 7.475 ns)
Hold timingPASS (0 violations, worst hold slack 0.106 ns)
Max slewFAIL (12 violations)
Max capFAIL (3 violations)
Max fanoutFAIL (9 violations)

Two harden attempts were useful. The first P34 run, RUN_2026-05-01_14-36-37, proved the reset cleanup helped: slew dropped to 1688 and cap dropped to 196. The second run, RUN_2026-05-01_14-58-10, used stronger repair settings and pushed the residual violations down to 12 slew and 3 cap.

That second run was not free. It inserted thousands of timing-repair buffers, needed antenna jumpers and diodes, and made detailed routing work through a large temporary violation count before converging to zero detailed-route DRC. But it did converge, and Magic DRC, KLayout DRC, LVS, and antenna all passed.

What remains: inspect the final handful of DRV/fanout violations directly instead of treating this as a broad architecture problem. P34 turns the issue from “the backend is shouting everywhere” into “there are specific nets to look at.”