RV32I official-test signature debug

P18 is not new silicon. It is the first useful compliance-harness repair after P17: make official self-check tests compare against real expected signatures instead of a placeholder zero-filled signature.

Status: RTL pass for a targeted official subset. I-nop-00.S, I-fence-00.S, I-lui-00.S, and I-addi-00.S pass through the P17 UART-loaded external-memory path. The full rv32i/I batch has NOT RUN to completion with generated signatures for every test.

The Result

Run it:

make -C projects/18_rv32i_lui_signature_debug/test

That is still a targeted acceptance set, not a full compliance claim.

The Bug

P17 had this placeholder signature file:

CANARY
.fill SIGUPD_COUNT*(SIG_STRIDE>>2),4,0
CANARY

That is enough for nop and fence, because those tests do not ask for interesting nonzero results. It is wrong for lui.

The trace showed the core doing the right thing:

The Fix

scripts/p17_arch_test_batch.py now writes a per-test signature file. For I-lui-00.S, it parses each official test operation:

lui xN, IMM

and emits:

x0 -> 0
other rd -> (IMM & 0xfffff) << 12

For I-addi-00.S, it uses the regular generated-test comments to reconstruct the source operand:

RVTEST_TESTDATA_LOAD_INT(..., xN) # load rs1: xN = 0x...
addi xD, xN, IMM # perform operation

and emits (rs1 + IMM) & 0xffffffff.

The runner still uses a zero-filled fallback for tests without a generated signature model. That keeps the honesty boundary clear: P18 proves two real instruction-class official tests, not the whole ISA.

What This Proves

P17’s first non-trivial official failure was not a broken LUI datapath. It was our local self-check setup comparing good hardware behavior against bad expected data.

That is a useful kind of failure. Now the next rung can either generate the next simple signature and expose the next real issue, or replace this ad hoc signature generation with a proper reference-model flow.