P21 adds the official I-auipc-00.S test to the P20 strict subset.
Status: RTL pass for a 23-test official subset. These are upstream
riscv-arch-testsources built inRVTEST_SELFCHECKmode, UART-loaded into the P17 external-memory model, and accepted only when the core reaches the local pass convention.
The Result
Run it:
make -C projects/21_rv32i_auipc_tests/test
| group | result |
|---|---|
P20 baseline: no-op/fence, LUI, immediate ALU, R-type ALU | PASS |
I-auipc-00.S | PASS |
Summary: PASS=23 FAIL=0 NOT RUN=0
This is not a full RV32I compliance claim. It is a larger, strict, official subset.
Signature Model
AUIPC computes pc + imm[31:12], so the expected result depends on the final
linked address of the instruction. The batch runner now emits label-based
expressions into the generated signature file:
.word (test_label + signed_20_bit_offset)
That keeps the model tied to the actual code image instead of duplicating the assembler and linker layout in Python.
What This Proves
The official pass set now covers the no-op/fence baseline, LUI, AUIPC, all
modeled immediate ALU tests, and all modeled R-type ALU tests.
The remaining unclaimed RV32I/I tests are control-flow and memory-access
tests: JAL, JALR, branches, loads, and stores.