Walker completion (megapages + sfence.vma + AMO xlate)

P53 fills the Sv32 holes P52 left out. Three small additions, all needed for Linux:

4 MiB megapages. Leaf at L1 now succeeds (with permission + alignment checks).
sfence.vma decoded as no-op. No TLB to invalidate, but the instruction must not raise illegal-instr.
AMO translation in S-mode. P52 only routed loads/stores; P53 routes AMO ops too, dispatching back to S_MEM (LR/SC) or S_AMO_LOAD (RMW) after the walk.

Status: RTL pass. Two new probes (megapage walk + sfence.vma + AMO-via-VA) PASS at 5,297,364 clocks. FreeRTOS demo still halts cleanly afterwards.

Why these specific features

A real Linux RV32 kernel maps itself with 4 MiB megapages, issues sfence.vma after every mapping change, and uses amoadd.w in spinlocks. Without these three, Linux hits an immediate page-fault, illegal-instr trap, or wrong memory write within the first hundred instructions.

What changed

is_sfence_vma decoded (funct7=0001001, funct3=000, rd=0). S_EXECUTE handles it as a direct jump to S_WB.
S_PTW1 megapage path: full leaf perm check, alignment check (PPN[0]==0), PA construction from {pte.PPN[1], va.VPN[0], va.offset}.
S_EXECUTE AMO branches now route through the walker if translation_active.
S_PTW0 / S_PTW1 success paths dispatch to S_AMO_LOAD for AMO RMW or S_MEM otherwise.
S_PTW0 perm check extended: LR needs R, SC needs W+D, AMO RMW needs R+W+D, A bit always.

What’s still missing

Instruction fetch translation (kernel code stays at identity-mapped PA).
Hardware A/D bit updates.
TLB.
SUM/MXR/MPRV.
ASID.

Files

src/top.sv - megapage + sfence + AMO routing
app/main.c - megapage_probe + amo_translation_probe

Harden

NOT RUN. Estimated +100 cells over P52.

What just happened?

The Sv32 walker is now complete enough for a real RV32 kernel to try to boot. Three of the four “holes that matter for booting” are closed; the fourth (instruction fetch translation) can be sidestepped by identity-mapping the kernel.

Next rung: platform shape (CLINT timer, larger memory, minimal SBI).