librelane playground

No. 54 / project of 147 on the ladder

Platform shape (16 MiB + SBI proof of concept)

introduces — external memory bumped to 16 MiB; SBI-style M-mode handler dispatching ECALL_FROM_S putchar

harden statelast run2026-05-03
areaunknownμm²
signoff
  • DRCNOT RUN
  • LVSNOT RUN
  • antennaNOT RUN
artifacts

P54 is the integration push toward kernel boot.

Status: RTL pass. SBI probe rounds two ECALL_FROM_S putchar calls through M-mode firmware and returns cleanly to S; FreeRTOS demo continues afterwards. PASS at 5,297,757 clocks. UART = S k X a b c d e f g h D.

What changed

  • External memory: 256 KiB → 16 MiB. Both MEM_BYTES in the testbench and RAM LENGTH in link.ld.
  • SBI-style M-mode handler. A naked trap handler that catches ECALL_FROM_S (mcause==9), reads the SBI function ID from a7, dispatches SBI_CONSOLE_PUTCHAR by writing a0 to the UART, and mret-s back to S. The probe also has an ebreak escape path that force-sets MPP=M so the chip ends up back in M after the test.

The probe runs a tiny S-mode “kernel” of three instructions (two ecalls + one ebreak) and verifies two SBI putchars made it through the firmware boundary.

Why this matters

This is the Linux/RISC-V boot model in miniature:

  • M-mode firmware (here: probe_sbi_handler) installed in mtvec.
  • S-mode “kernel” (here: tiny asm sequence) does ECALL_FROM_S with SBI function ID in a7 and arg in a0.
  • Firmware catches the trap, dispatches, returns via mret.
  • Kernel continues on next instruction.

The chip’s RTL already supports the priv/trap pieces (P49-P51). P54 proves the integration works: M-mode firmware can install a handler, S-mode software can call into it, and the round-trip is clean.

What’s left for actual Linux boot

This is the natural end-of-autonomous-mode handoff. The remaining work needs supervision:

  • Real SBI runtime (full function-ID set: putchar, getchar, set-timer, shutdown, …)
  • CLINT-style timer at standard SiFive MMIO addresses.
  • PLIC-shaped external interrupt controller.
  • Device tree blob.
  • A built RV32 Linux kernel image.
  • Initramfs.
  • Hardware A/D bit updates.
  • Instruction fetch translation.

Each is one or more additional rungs of work. Plus the actual kernel-build / DTB / initramfs construction is supervised debugging territory.

Files

  • runtime/link.ld - RAM length 256K → 16M
  • test/tb_freertos_demo.sv - MEM_BYTES bump
  • app/main.c - SBI handler + sbi_probe

Harden

NOT RUN. No RTL deltas vs P53; synthesis identical.

What just happened?

The chip can run a real S-mode “kernel” that talks to M-mode firmware via the SBI calling convention. With 16 MiB of memory and a clean ECALL_FROM_S → dispatch → mret round-trip, the architectural work is done. Going further means building a real kernel image and debugging real OS boot — that’s supervised work.